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6-Channel, Serial Input Master/Balance Volume Controls SSM2160
FEATURES Clickless Digitally Controlled Level Adjustment SSM2160: 6 Channels 7-Bit Master Control Gives 128 Levels of Attenuation 5-Bit Channel Controls Give 32 Levels of Gain Master/Channel Step Size Set by External Resistors 100 dB Dynamic Range Automatic Power-On Mute Excellent Audio Characteristics: 0.01% THD+N 0.001% IMD (SMPTE) -90 dBu Noise Floor -80 dB Channel Separation 90 dB SNR Single-and Dual-Supply Operation APPLICATIONS Home Theater Receivers Surround Sound Decoders Circle Surround(R) and AC-3(R) Decoders DSP SoundfieldTM Processors HDTV and Surround TV Audio Systems Automotive Surround Sound Systems Multiple Input Mixer Consoles and Amplifiers GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM
V+ V- VREF POWER SUPPLY AND REFERENCE GENERATOR VCA CH1 IN
CH1 OUT
5-BIT CHANNEL DAC CH2 IN
VCA
CH2 OUT
5-BIT CHANNEL DAC CH3 IN
VCA
CH3 OUT
5-BIT CHANNEL DAC CH4 IN
VCA
CH4 OUT
The SSM2160 allows digital control of volume of six audio channels, with a master level control and individual channel controls. Low distortion VCAs (voltage controlled amplifiers) are used in the signal path. By using controlled rate-of-change drive to the VCAs, the "clicking" associated with switched resistive networks is eliminated in the master control. Each channel is controlled by a dedicated 5-bit DAC providing 32 levels of gain. A master 7-bit DAC feeds every control port giving 128 levels of attenuation. Step sizes are nominally 1 dB and can be changed by external resistors. Channel balance is maintained over the entire master control range. Upon power-up, all outputs are automatically muted. A 3-wire or 4-wire serial data bus enables interfacing with most popular microcontrollers. Windows(R) software and an evaluation board for controlling the SSM2160 are available. The SSM2160 can be operated from single supplies of +10 V to +20 V or dual supplies from 5 V to 10 V. An on-chip reference provides the correct analog common voltage for single-supply applications. The SSM2160 comes in a SOIC package; see the Ordering Guide for details.
5-BIT CHANNEL DAC CH5 IN
VCA
CH5 OUT
5-BIT CHANNEL DAC CH6 IN
VCA
CH6 OUT
5-BIT CHANNEL DAC 7-BIT MASTER DAC STEP SIZE ADJUST
CH SET MSTR SET MSTR OUT
CLK DATA LD WRITE SHIFT REGISTER AND ADDRESS DECODER
SSM2160
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) 2003 Analog Devices, Inc. All rights reserved.
= 25 C, A = 0 R noted.) SSM2160-SPECIFICATIONS (V ==10 6k V,,Tunless otherwisedB, f = 1 kHz, f
S A V AUDIO L
CLOCK
= 250 kHz,
Parameter AUDIO PERFORMANCE Noise Floor Total Harmonic Distortion + Noise
Symbol NFL THD+N
Conditions VIN = GND, BW= 20 kHz, AV = 0 dB1 Second and Third Harmonics Only, VOUT = 0 dBu2 AV = 0 dB Any Channel to Another NFL to Clip Point VS = 10 V Any Channel VS = 10 V, All Conditions of Master Attenuation and Channel Gain
Min
Typ -90
Max
Unit dBu
Channel Separation Dynamic Range ANALOG INPUT Maximum Level Impedance ANALOG OUTPUT Maximum Level3 Impedance Offset Voltage Minimum Resistive Load Maximum Capacitive Load MASTER ATTENUATOR ERROR AV = 0 dB AV = -20 dB AV = -40 dB AV = -60 dB CHANNEL MATCHING CHANNEL GAIN ERROR AV = 0 dB AV = 10 dB AV = 31 dB MUTE ATTENUATION VOLTAGE REFERENCE Accuracy Output Impedance CONTROL LOGIC Logic Thresholds High (1) Low (0) Input Current Clock Frequency Timing Characteristics POWER SUPPLIES Voltage Range SSM2160 SSM2160 Supply Current VREF ZOUT RL min CL max VIN max ZIN
0.01 80 100
0.035
% dB dB V rms k
1.8 10
1.8 10 20 10 50
V rms mV k pF
Measured from Best Fit of All Channels from 0 dB and -127 dB (or Noise Floor) Channel Gain = 0 dB Channel Gain = 0 dB Channel Gain = 0 dB Channel Gain = 0 dB
0.5 1.0 2.0 2.5 1.0
dB dB dB dB dB dB dB dB dB %
Master Attenuation = 0 dB 0.5 1.0 2.0 VIN = 0 dBu Percent of
(V +) +(V - ) 2
-95 5 5
Re: DGND
2.0 0.8 1 1000
1 See Timing Diagrams
V V A kHz
VS V+, V-
Single Supply Dual Supply No Load
10 5 20
20 10 28
V V mA
NOTES 1 Master = 0 dB; Channel = 0 dB. 2 Input level adjusted accordingly. 0 dBu = 0.775 V rms. 3 For other than 10 V supplies, maximum is V S/4. Specifications subject to change without notice.
-2-
REV. A
SSM2160 TIMING CHARACTERISTICS
Timing Symbol tCL tCH tDS tDH tCW tWC tLW tWL tL tW3 Description Input Clock Pulsewidth, Low Input Clock Pulsewidth, High Data Setup Time Data Hold Time Positive CLK Edge to End of Write Write to Clock Setup Time End of Load Pulse to Next Write End of Write to Start of Load Load Pulsewidth Load Pulsewidth (3-Wire Mode) Min 200 200 50 75 100 50 50 50 250 250 Typ Max Unit ns ns ns ns ns ns ns ns ns ns
NOTES 1. An idle HI (CLK-HI) or idle LO (CLK-LO) clock may be used. Data is latched on the negative edge. 2. For SPITM or MicrowireTM 3-wire bus operation, tie LD to WRITE and use WRITE pulse to drive both pins. (This generates an automatic internal load signal.) 3. If an idle HI clock is used, t CW and tWL are measured from the final negative transition to the idle state. 4. The first data byte selects an address (MSB HI), and subsequent MSB LO states set gain/attenuation levels. Refer to the Address/Data Decoding Truth Table. 5. Data must be sent MSB first.
0 CLK 1 1 DATA 0 1 WRITE 0 1 LD 0 D7 D6 D5 D4 D3 D2 D1 D0
tCH 1 CLK 0 tDS 1 DATA 0 1 WRITE 0 1 LD 0 tWC
MSB D7
tCL
tDH
tCW
tL tWL tLW
Figure 1. Timing Diagrams
REV. A
-3-
SSM2160
ABSOLUTE MAXIMUM RATINGS 1 PIN CONFIGURATION 24-Lead SOIC
V+ 1 AGND 2 VREF 3 CH1 OUT 4 CH1 IN 5 CH3 OUT 6 24 CH SET 23 MSTR OUT 22 MSTR SET 21 CH2 OUT
Supply Voltage Dual Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Single2 (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +5 V Operating Temperature Range . . . . . . . . . . . . . . . 0C to 70C Storage Temperature Range . . . . . . . . . . . . . -65C to +150C Junction Temperature Range . . . . . . . . . . . . . -65C to +165C Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300C
ESD Ratings
SSM2160
20 CH2 IN
883 (Human Body) Model . . . . . . . . . . . . . . . . . . . . . . 2.5 kV
PACKAGE THERMAL INFORMATION
TOP VIEW 19 CH4 OUT (Not to Scale) 18 CH4 IN CH3 IN 7 17 CH6 OUT 16 CH6 IN 15 DATA 14 CLK 13 DGND
CH5 OUT 8 CH5 IN 9 WRITE 10 LD 11 V- 12
Package Type 24-Lead SOIC
JA
3
JC
Unit C/W
71
23
NOTES 1 Absolute maximum ratings apply at 25C, unless otherwise noted. 2 VS is the total supply span from V+ to V-. 3 JA is specified for the worst-case conditions for device soldered onto a circuit board for SOIC packages.
ORDERING GUIDE
Model SSM2160S SSM2160S-REEL EVAL-SSM2160EB
Temperature Range 0C to 70C 0C to 70C
Package Description 24-Lead SOIC 24-Lead SOIC Evaluation Board
Package Option R-24 R-24
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the SSM2160 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
-4-
REV. A
SSM2160
PIN FUNCTION DESCRIPTIONS
Pin No. 1 2
Mnemonic V+ AGND
Function Positive Power Supply. Refer to the Application Information section for details on the power supply. Internal Ground Reference for the Audio Circuitry. When operating the SSM2160 from dual supplies, AGND should be connected to ground. When operating from a single supply, AGND should be connected to VREF, the internally generated voltage reference. AGND may also be connected to an external reference. Refer to the Application Information section for more information on the power supply. VREF is the internally generated ground reference for the audio circuitry obtained from a buffered divider between V+ and V-. In a dual-supply application with the AGND pin connected to ground, VREF should be left floating. In a single-supply application, VREF should be connected to AGND. Refer to the Application Information section for more information on the power supply. Audio Output from Channel 1 Audio Input to Channel 1 Audio Output from Channel 3 Audio Input to Channel 3 Audio Output from Channel 5 Audio Input to Channel 5 A logic low voltage enables the SSM2160 to receive information at the DATA input (Pin 15). A logic high retains data at their previous settings (Figure 1). Serves as CHIP SELECT. Loads the Information Retained by WRITE into the SSM2160 at logic low (Figure 1). Negative Power Supply. Connect to ground in a single-supply application. Refer to the Application Information section for details on the power supply. Digital Ground Reference. This pin should always be connected to ground. All digital inputs, including WRITE, LD, CLK, and DATA are TTL input compatible; drive currents are returned to DGND. Clock Input. It is positive edge triggered (Figure 1). Channel and master control information flows MSB first into the DATA pin. Refer to the Address/Data Decoding Truth Table, Figure 7, for information on how to control the VCAs. Audio Input to Channel 6 Audio Output from Channel 6 Audio Input to Channel 4 Audio Output from Channel 4 Audio Input to Channel 2 Audio Output from Channel 2 Connected to the inverting input of an I-V converting op amp. It is used to generate a master control voltage from the master control DAC current output. A resistor connected from MSTR OUT to MSTR SET reduces the step size of the master control. See the Master/Channel Step Sizes section for more details. A 10 F capacitor should be connected from MSTR OUT to MSTR SET to eliminate the zipper noise in the master control. Connected to the output of the I-V converting op amp. See MSTR SET description. The step size of the channel control can be increased by connecting a resistor from CH SET to V+. No connection to CH SET is required if the default value of 1 dB per step is desired. Minimum of 10 external resistor. See the Master/Channel Step Sizes section for details.
3
VREF
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
CH1 OUT CH1 IN CH3 OUT CH3 IN CH5 OUT CH5 IN WRITE LD V- DGND CLK DATA CH6 IN CH6 OUT CH4 IN CH4 OUT CH2 IN CH2 OUT MSTR SET
23 24
MSTR OUT CH SET
REV. A
-5-
SSM2160-Typical Performance Characteristics
10
1.0
1.0
TA = 25 C VS = 6V VIN = 0dBu RL = 10k CL = 50pF
THD+N - %
0.5
VS = 10V VS = 15V
0.1 VS = 20V THD+N - %
0.1
TA = 25 C DUAL-SUPPLY OPERATION VIN = SINEWAVE @ 1kHz RL = 10k , CL = 50pF MASTER/CHANNEL = 0dB
THD+N - %
0.1
0.01
VS =
12V
VS =
6V
0.01
0.001 -70
-60
-40
-20 0 GAIN - dB
10
20
0.001 0.01
TA = 25 C SINGLE-SUPPLY OPERATION VIN = SINEWAVE @ 1kHz RL = 10k , CL = 50pF MASTER/CHANNEL = 0dB 1.0 0.1 INPUT VOLTAGE - V rms 10
0.01 0.005 0.05
VS =
5V
0.1
1.0 INPUT VOLTAGE - V rms
10
TPC 1. THD vs. Gain
TPC 2. THD+N % vs. Amplitude
TPC 3. THD+N % vs. Amplitude
0.1
-40
CHANNEL SEPARATION - dB
OUTPUT - dB
TA = 25 C DUAL-SUPPLY OPERATION VIN = 300mV rms@1kHz RL = 10k , CL = 50pF MASTER/CHANNEL = 0dB LPF: < 22kHz
-40 -50 -60 -70 -80 -90 TA = 25 C VS = 6V VIN = 1V rms @ 1kHz RL = 10k , CL = 50pF
THD+N - %
TA = 25 C -50 VS = 6V VIN = 1V rms @ 1kHz -60 VIN = GND (NONSELECTED CH) RL = 100k , CL = 50pF -70 LPF: < 22kHz -80 -90 -100 -110
VS = 0.01 VS = 6V
12V
-100 -110
0.001 20
100
1k FREQUENCY - Hz
10k
30k
-120 20
100
1k FREQUENCY - Hz
10k 20k
-120 20
100
1k FREQUENCY - Hz
10k
30k
TPC 4. THD+N % vs. Frequency
TPC 5. Channel Separation vs. Frequency
TPC 6. Mute vs. Frequency
-60 -65 -70 -75 TA = 25 C VS = 6V VIN = GND
NOISE - dBu
-80 -85 -90 -95
-100 -105 -110 -70 -60 -40 -30 -20 -10 0 10 GAIN - dB 20 30 40
TPC 7. Noise vs. Gain
-6-
REV. A
Typical Performance Characteristics-SSM2160
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 0 TA = 25 C VS = 12V VIN = 0dBu @ 1kHz RL = 100k MASTER = 20dB CHANNEL = 0dB
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140
AMPLITUDE - dBu
AMPLITUDE - dBu
AMPLITUDE - dBu
TA = 25 C VS = 12V VIN = -31dBu @ 1Hz RL = 100k MASTER = 0dB CHANNEL = 0dB
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 0 2 4
TA = 25 C VS = 12V VIN = -31dBu @ 1kHz RL = 100k MASTER = 0dB CHANNEL = 31dB
2
4
6
8 10 12 14 16 18 20 22 FREQUENCY - kHz
0
2
4
6 8 10 12 14 16 18 20 22 FREQUENCY - kHz
6 8 10 12 14 16 18 20 22 FREQUENCY - kHz
TPC 8. THD vs. Frequency (FFT)
TPC 9. THD vs. Frequency (FFT)
TPC 10. THD vs. Frequency (FFT)
0.100 TA = 25 C VS = 12V SMPTE 4:1 IM-FREQ 60Hz/7kHz RL = 100k
0.010
0.001
0.0001 0.05
0.1
1.0 INPUT AMPLITUDE - V rms
5.0
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 0 2
AMPLITUDE - dBu
1MD (SMPTE) - %
TA = 25 C VS = 12V RL = 100k A MASTER = 0dB CHANNEL = +31dB B MASTER/CHANNEL = 0dB
-20 TA = 25 C -30 VS = 6V 10% LPF = <22kHz -40 MASTER = 0dB CHANNEL = 0dB -50 -60 -70 -80 -90 PSR+
PSR-
A
B 4 6 8 10 12 14 16 18 20 22 FREQUENCY - kHz
PSR - dB
-100 20
100
1k FREQUENCY - Hz
10k
30k
TPC 11. SMPTE IM vs. Amplitude V rms
25 24
TPC 12. Noise Floor FFT
TPC 13. PSR vs. Frequency
SUPPLY CURRENT - mA
23 22 21 20 19 18 17 16 15 4 5 6 7 8 9 10 11 SUPPLY VOLTAGE - V 12 13
TPC 14. ISY vs. VS
REV. A
-7-
SSM2160
APPLICATIONS INFORMATION General Dual Power Supplies
The SSM2160 is a 6-channel volume control intended for multichannel audio applications. While dual-channel controls sufficed for stereo applications, rapidly emerging home theater surround sound and auto sound venues demand both 4-channel and 6-channel high performance controls. Line level signals are fed to the six high impedance inputs. The system microcontroller sets the gain of the six channels via a 3-wire or 4-wire data bus. In a home theater receiver, the outputs may be fed to the power amplifiers or buffered and connected to pre-out/amp-in ports on the rear panel. Refer to Figure 5 for a typical signal chain using the SSM2160. The master control serves the volume control function, and the channel control serves the balance function. The 6-channel capability allows complete control of the front left, front right, center, rear left, rear right, and sub-bass audio channels.
Power Supplies vs. Signal Levels
As shown in Figure 2, the AGND pin should be connected to ground and VREF should be left floating. The digital ground pin, DGND, should always be connected to ground for either singleor dual-supply configurations. Pins 1 and 12 should each have a 10 F capacitor connected to ground, with a 0.1 F capacitor placed as close as possible to the SSM2160 to help reduce the effects of high frequency power supply noise. When a switching power supply is used, or if the power supply lines are noisy, additional filtering of the power supply lines may be required.
V+ 10 F + 0.1 F
1
V+
SSM2160
2 AGND
The SSM2160 can be operated from dual supplies from 5 V to 10 V and from single supplies from +10 V to +20 V. To keep power dissipation to a minimum, use the minimum power supply voltages that will support the maximum input and output signal levels. The peak-to-peak output signal level must not exceed 1/4 of the total power supply span, from V+ to V-. This restriction applies for all conditions of input signal levels and gain/attenuation settings. Table I shows supply voltages for several typical output signal levels for the device. An on-chip buffered voltage divider provides the correct analog common voltage for single-supply applications.
Table I. Signal Levels vs. Power Supplies
VREF
V- 10 F + 0.1 F
12
V-
13
DGND
Figure 2. Dual-Supply Configuration
Single Power Supply
Max Output, Max Output V rms (V p-p) (dBu) Single +VS(V) Dual 0.9 (2.5) 1.1 (3.0) 1.3 (3.7) 1.8 (5.0) +1.3 +3.0 +4.5 +7.3 10 12 15 20 5 6 7.5 10
VS(V)
When a single supply is used, it is necessary to connect AGND (Pin 2) to VREF (Pin 3), as shown in Figure 3. VREF supplies a voltage midway between the V+ and V- pins from a buffered resistive divider. When supplying this reference to stages ahead of the SSM2160 (to eliminate the need for input dc blocking capacitors, for example), the use of an additional external buffer, as shown in Figure 4, may be necessary to eliminate any noise pickup.
V+ + 10 F
1 0.1 F 2
V+
SSM2160
AGND
3 VREF + 10 F 0.1 F 12 V-
13
DGND
Figure 3. Single-Supply Configuration
-8-
REV. A
SSM2160
Digital Control Range Plan
V+ + 10 F 0.1 F 2 1 V+
SSM2160
AGND CHn IN
REF OUT + 10 F 3 0.1 F 12
VREF
V-
The SSM2160 may be modeled as six ganged potentiometers followed by individual programmable gain channel amplifiers, as shown in Figure 6. In actuality, each channel's signal level is set by a VCA that can give gain or attenuation, depending upon the control voltage supplied. The input potentiometers have a maximum gain 0 dB (unity), a minimum gain of -127 dB, and change in 1 dB steps. The channel amplifiers each have minimum gain of 0 dB and a maximum gain of 31 dB and also change in 1 dB steps. The data settings for the attenuation of the master potentiometer and the channel amplifier are shown in Table II.
INPUT 0dB
13
DGND
Figure 4. Single-Supply Operation with VREF Buffer
Signal Chain Considerations
MASTER -127dB +31dB 0dB CHANNEL OUTPUT
The SSM2160 is capable of providing an extremely wide control range, from -127 dB of attenuation (limited only by the noise floor) to +31 dB of gain. When configuring the system, the SSM2160 should be in the signal chain where input signals allow the minimum VCA gain to be used, thus ensuring the lowest distortion operation. In consumer products, sources that supply line level signals include FM/AM tuner, phono preamp, cassette deck, CD, laser disk, VCR, LINE, AUX, and microphone preamp. Figure 5 shows a typical application where the SSM2160 has been placed between a surround sound decoder and the power amplification stages. This allows the user to adjust both volume and balance between six speakers through the use of the master and channel controls.
POWER AMPS FM/AM TUNER PHONO PREAMP CASSETTE DECK COMPACT DISK LASER DISK VCR MICROPHONE
Figure 6. Potentiometer Representation of SSM2160 (One Channel Only)
Table II. Master and Channel Control
dB Master Channel Min Atten Max Atten Max Gain Midgain Min Gain 0 -127 +31 +15 0
Data Hex 7F 00 00 10 1F
Binary 1111111 0000000 00000 10000 11111
MUX
SURROUND SOUND DECODER
SSM2160
TO SPEAKERS
LINE LEVEL INPUTS - STEREO PAIRS
VOLUME AND BALANCE CONTROLS
When using channel controls as balance controls, the center would be with Channel = 10h (or 0Fh if desired). Increasing the gain to the maximum would occur at Channel = 00h. Reducing the gain to minimum would occur at Channel = 1Fh.
Figure 5. Typical Signal Chain Using the SSM2160
MSB
LSB MSB
LSB
ADDRESS MODE SELECTION 7-BIT MASTER DAC 5-BIT CHANNEL DAC 1 5-BIT CHANNEL DAC 2 5-BIT CHANNEL DAC 3 5-BIT CHANNEL DAC 4 5-BIT CHANNEL DAC 5 5-BIT CHANNEL DAC 6 NO DAC SELECTED 1 1 1 1 1 1 1 1 X X X X X X X X X X X X X X X X ADDRESS X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 X X X X X X X
DATA MODE DATA
X
X
X
X
X
X = DON'T CARE SHADED AREA IS DATA
0 = MUTE 1 = UNMUTE
Figure 7. Interface Characteristics, DAC Address/Data Decoding Truth Table
REV. A
-9-
SSM2160
Serial Data Input Format
The standard format for data sent to SSM2160 is an address byte followed by a data byte. This is depicted in the truth table, Figure 7. Two 8-bit bytes are required for each master and each of the six channel updates. The first byte sent contains the address and is identified by the MSB being logic high. The second byte contains the data and is identified by the MSB being logic low. The seven LSBs of the first data byte set the attenuation level from 0 dB to -127 dB for the master. The five LSBs of the byte set the channel gain levels from 0 dB to 31 dB.
Serial Data Control Inputs
If unity overall gain is required from the SSM2160, there should be no net gain between the master (loss) and channel (gain), with both at their lowest attenuation position. Minimum channel gain is recommended for minimum distortion.
RM RM, RC, C EXTERNAL C SUMMATION RESISTOR R SSM2160 i V+ IFS SET CHANNEL DAC RC
IN SIGNAL OUT
MASTER DAC
The SSM2160 provides a simple 3-wire or 4-wire serial interface--see the timing diagram in Figure 1. Data is presented to the DATA pin and the serial clock to the CLK pin. Data may be shifted in at rates up to 1 MHz (typically). The shift register, CLK, is enabled when the WRITE input is low. The WRITE thus serves as a chip select input; however, the shift register contents are not transferred to the holding register until the rising edge of LD. In most cases, WRITE and LD will be tied together, forming a traditional 3-wire serial interface. To enable a data transfer, the WRITE and LD inputs are driven logic low. The 8-bit serial data, formatted MSB first, is input on the DATA pin and clocked into the shift register on the falling edge of CLK. The data is latched on the rising edge of WRITE and LD.
Table III. Input/Output Levels vs. Attenuation/Gain
Figure 8. VCA Control Scheme
Control Range and Channel Tracking
Each channel VCA is controlled by its own DAC's output, plus the control signal from the master DAC. This is shown in Figure 8. Channel DACs are configured to increase the gain of the VCA in 1 dB steps from 0 dB to 31 dB. Thus, the midpoint (15, or 16 if preferred) should be chosen as the center setting of the electronic balance controls. Since the master DAC feeds all summation nodes, the attenuation of all VCAs simultaneously changes from 0 dB to the noise floor. Maximum attenuation of all channels occurs when the master is set to -127 dB attenuation, and the channel is set to 0 dB gain. Minimum attenuation of all channels occurs when the master is set at 0 dB, and the channel is set to 31 dB. Once the channel-to-channel balance has been set, the master may be changed without changing the balance. This is shown in Figure 9.
NET GAIN/ATTEN +31 0 0 0 0 0 CHANNEL CHANNEL +16 +16 GAIN GAIN 0 0 11111 111111 -16 +31 -32 -48 MASTER -64 ATTENUATION -80 -96 -112 NOISE FLOOR +31 +16 0 00000 CHANNEL GAIN 11111
Input
Gain/Loss Channel Net 31 31 31 0 31 31
Output dBu 0 0 3 mV rms 775 775 1100
dBu mV rms Master 0 -31 -28 775 22 31 -31 0 0
Saturation Prevention
Unlike a passive potentiometer, the SSM2160 can give up to 31 dB of gain, thereby creating a potential for saturating the VCAs, resulting in an undesirable clipping or overload condition. Careful choice of input signal levels and digital gain parameters will eliminate the possibility. A few of the many acceptable gain and attenuation settings that keep the signals within the prescribed limits are shown in Table III. The input and output levels are given in mV rms and dBu (0 dBu = 0.775 V rms). Line one of the table: the master is not allowed to have less than -31 dB attenuation, and the channel is allowed +31 dB of gain. Since the net gain is zero, there is no possibility of overload with the expected maximum input signal. Line two of the table shows that input signal limited to -31 dBu will allow +31 dB of channel gain and 0 dB of master attenuation. With an input below -31 dBu, the output will never exceed 0 dBu, so no overloading is possible. Line three of the table allows an input of -28 dBu, master attenuation of 0 dB, and 31 dB channel gain. The output is a maximum of 3 dBu (1.1 V rms), which is acceptable for power supplies of 6 V or more. So long as V p-p < VSUPPLY/4, there will be no overloading (see Table I).
-128 0 0 0 0 0 0
Figure 9. Practical Control Range
Master/Channel Step Sizes
The details of the DAC control of the channel VCAs is depicted in Figure 8. A 7-bit current output DAC and an op amp convert the digitally commanded master control level to an analog voltage. A capacitor across the feedback resistor limits the rate of change at the output to prevent clicking. A 5-bit DAC converts the digitally commanded channel control level to a voltage via a resistor R. These two control signals sum in resistor R and are fed to the channel VCA. Although we present the attenuation and gain as two separate items, in fact, the VCA can be operated smoothly -10- REV. A
SSM2160
from a gain condition to an attenuation. The master and channel step sizes default to 1 dB in the absence of external components. The step sizes can be changed by the addition of external resistors if finer resolution is desired.
Control Range vs. Step Size
Before adjusting step sizes from the standard 1 dB, consider the effect on control range. The master control and the channel control provide 1 dB step sizes, which may be modified by the addition of external resistors. As the total number of steps is unchanged, reduction of the step size results in a smaller control range. The range of the control is
RANGE = Step Size (dB ) x ( Number of Levels Used )
could be some variation from lot to lot, so applications requiring precise step size should include a fixed resistor plus a trimmer potentiometer to span the calculated value 25%. In this example, RC is not needed since the default channel step size is already 1 dB. CH SET is left floating. With this step size, the dynamic range of the master control is
DNR = 0.5 x 127 dB = 63.5 dB
Since the master volume control operates from a 7-bit word, its DAC has 128 levels (including 0). The channel volume control DAC is a 5-bit input, so there are 32 levels for volume control (including 0). As can be seen in Figure 9, the practical control range is set by the noise floor. It can be advantageous to reduce the master step size to give finer steps from zero attenuation down to the noise floor.
Reducing Master Step Size
In this configuration, the maximum master volume is 0 dB, while the minimum volume is -63.5 dB. Since the channel volume can still provide 0 dB to 31 dB of gain, the total system gain can vary between -63.5 dB and +32 dB. Note that a 0 dB command setting to the master control always results in unity gain, regardless of the step size.
Channel Step Size
To reduce the master step size, place resistor RM between MSTR SET and MSTR OUT. The master step size of the master volume control will then become
RM = 1700 X M 1- X M
The channel DACs' full-scale current is set by an internal resistor to V+. By shunting this resistor, the full-scale current, and therefore the step size, will increase. No provisions are available for reducing the channel step size. To increase the channel step size, place a resistor, RC, from CH SET to V+. Note that a 0 dB setting for a channel will always give unity gain, regardless of how large or small the step size is. This is true for both the master and channel volume controls.
1.5
1.4
CHANNEL STEP SIZE
where XM is the desired master control step size in decibels. See Figure 10 for practical values of RM. Note that the step size for the master control can only be adjusted to less than 1 dB. No resistor is required for the default value of 1 dB per step. For larger step sizes, use digital control. Noninteger dB step sizes can be obtained by using digital control and a reduced step size.
1.0
1.3
1.2
1.1
MASTER STEP SIZE - dB
0.8
1.0 101
102 RC
103
0.6
Figure 11. Channel Step Size vs. RC
Example: Modifying Channel Step Size
0.4
0.2
0 102
A channel step size of 1.3 dB is desired. From Figure 11 we see that a 40 resistor (approximately) connected from CH SET to V+ is required. As this varies from lot to lot, the exact value should be determined empirically, or a fixed resistor plus trimmer potentiometer should be used. Take care not to short Pin 24 to Pin 1 as damage will result.
103 RM 104 105
Muting
Figure 10. Master Step Size vs. RM
Example: Modifying Master Step Size to 0.5 dB
A master step size of 0.5 dB is desired for the master control, while a 1 dB step size is adequate for the channel control. Using the preceding equation or Figure 10, RM is found to be 1700 and is connected between MSTR SET and MSTR OUT. There
The SSM2160 offers master and channel muting. On power-up, the master mute is activated, thus preventing any transients from entering the signal path and possibly overloading amplifiers down the signal path. Mute is typically better than -95 dB relative to a 0 dBu input. Due to design limitations, the individual channel muting results in increased signal distortion in the unmuted channels. Users should determine if this condition is acceptable in the particular application.
REV. A
-11-
SSM2160
DC Blocking and Frequency Response
All internal signal handling uses direct coupled circuitry. Although the input and output dc offsets are small, dc blocking is required when the signal ground references are different. This will be the case if the source is from an op amp that uses dual power supplies (i.e., 6 V), and the SSM2160 uses a single supply. If the signal source has the capability of operating with an externally supplied signal, connect the VREF (Pin 3) to the source's external ground input either directly or through a buffer as shown in Figure 4. The same consideration is applied to the load. If the load is returned to AGND, no capacitor is required. When the SSM2160 is operated from a single supply, there will be a dc output level of +VS/2 at the output. This will require dc blocking capacitors if driving a load referred to GND. When dc blocking capacitors are used at the inputs and outputs, they form a high-pass filter with the input and load resistance, both of which are typically 10 k. To calculate the lower -3 dB frequency of the high-pass filter formed by the coupling capacitor and the input resistance, use either of the following formulas
fC = 1 (2RC ) or C = 1 (2RfC
proper bypassing. In addition, limiting the high state logic signal levels to 3.5 V will minimize noise coupling.
Load Considerations
The output of each SSM2160 channel must be loaded with a minimum of 10 k. Connecting a load of less than 10 k will result in increased distortion and may cause excessive internal heating with possible damage to the device. Capacitive loading should be kept to less than 50 pF. Excessive capacitive loading may increase the distortion level and may cause instability in the output amplifiers. If your application requires driving a lower impedance or more capacitive load, use a buffer as shown in Figure 12.
CH1 OUT 1/2 SSM2135 CH1 OUT
SSM2160
CH6 OUT 1/2 SSM2135 CH6 OUT
Figure 12. Output Buffers to Drive Capacitive Loads
Windows Software
where R is the typically 10 k input resistance of the SSM2160 or the load resistance. C is the value of the blocking capacitor when fC is known. If a cutoff frequency of 20 Hz were desired, solving for C gives 0.8 F for the input or output capacitor. A higher load impedance will allow smaller output capacitors to give the same 20 Hz cutoff. Note that the overall low-pass filter will be the cascade of the two, so the response will be -6 dB at 20 Hz. A practical and economical choice would be 1 F/15 V electrolytics.
Signal/Noise Considerations and Channel Center Gain
)
Windows software is available to customers from Analog Devices to interface the serial port of a PC (running Windows 3.1 or higher) with the SSM2160. Contact your sales representative for details on obtaining the software. For details, see the Evaluation Board section.
RC*
V+ 10F
+
1 0.1 F 2 3 23 22 21 + 10 F RM* OUT CH 2 IN OUT CH 4 IN OUT CH 6 16 15 14 13 IN DATA CLK
**OPTIONAL SEE "CHANNEL STEP SIZE" **TYPICAL 1 F-10 F: SEE "DC BLOCKING AND FREQUENCY RESPONSE"
Figure 13. Typical Application Circuit (Dual Supply)
Digital Interface
Digital logic signals have fast rising and falling edges that can easily be coupled into the signal and ground paths if care is not taken with PC board trace routing, ground management, and
-12-
+
The SSM2160 should be placed in the signal flow where levels are high enough to result in low distortion and good SNR but not so high to require unusually high power supplies. In a typical application, input and output signal levels will be in the 300 mV 200 mV rms range. This level is typically available from internal and external sources. As previously mentioned, the 31 dB of gain available in the VCA is usually used for balancing the various channels and is usually set to 15 dB or 16 dB in its center position. Due to the nature of VCA performance versus gain, the minimum gain that will allow balancing the channels should be used. If no balance function is required, the channel gain should be set to 0 dB. Use the lowest value of centered gain when less than the full balance range is needed. For example, if only 6 dB channel gain variations were needed, the center could be set at 6 dB, giving 6 dB 6 dB, rather than at 15 dB 6 dB. This would result in improved S/N ratio and less distortion.
OUT CH 1 IN OUT CH 3 IN OUT CH 5 IN WRITE LD V- 10 F
**
4 5 6 7 8 9 10 11 12
SSM2160
20 19 18 17
0.1 F
REV. A
SSM2160
Controlling Stereo Headphones Level and Balance
+5V V+ AGND 1 2 + C2 100pF R1* 500 R2 6k +5V 4 150 - 5V +5V 150 - 5V R1* 500 R2 6k C2 100pF
Figure 14 shows how the SSM2160 can be configured to drive a stereo headphone output amplifier. Note that the minimum load specification precludes driving headphones directly. This example assumes that audio left and right signals are being fed into Channels 1 and 2, respectively. Additional amplifiers could be connected to the outputs to provide additional channels. The master control will set the loudness, and the channel controls will set the balance. The headphone amplifiers may be connected to the same power supplies as the SSM2160. The stereo audio signals are directly coupled to the noninverting input of both op amps. Depending upon the headphones and the signal levels, the optional R1 may be selected to provide additional gain, which is determined by
R2 AV = 1+ R1
15 F* 50k LEFT HEADPHONE 600
CH1 OUT
SSM2135-A
21
SSM2160
CH2 OUT
SSM2135-B
15 F* RIGHT HEADPHONE 600
-5V V- DGND 12 + 13
50k
*SEE TEXT FOR ALTERNATE VALUES
As an example, suppose a high impedance headphone (600 ) required a minimum of 25 mW to produce the desired loudness. Further, suppose the system design made available an output level from the SSM2160 of 300 mV. If the output were buffered without gain and applied directly to the headphone, the power would be
P= V2 R
Figure 14. Headphone Output Amplifier Configuration
EVALUATION BOARD FOR THE SSM2160
P=
(0.3)
2
600
= 0.15 mW
This is obviously too little power, so we solve the equation for the voltage required to produce the desired power of 25 mW
V = PR V = 0.025 x 600 = 3.9 V rms
The following information is to be used with the SSM2160 evaluation board, which simplifies connecting the part into existing systems. Audio signals are fed in and out via standard RCA-type audio connectors. A stereo headphone driver socket is provided for the convenience of listening to Channels 1 and 2. Microsoft Windows software is available for controlling the serial data bus of the SSM2160 via the parallel port driver (LPT) of a PC. The software may be downloaded from the Analog Devices website at www.analog.com. The evaluation board comes complete with the necessary parallel port cable and telephone type plug that mates with the evaluation board.
Power Supplies
The gain of the amplifiers must then be
AV = 3.89 = 13 0.3 R2 R1
The evaluation board should be connected to 6 V supplies for initial evaluation. If other supply voltages are planned, they can be subsequently changed. The power configuration on the evaluation board is per Figure 2.
Signal Inputs and Outputs
AV = 1 +
R2 = 12 R1 R1 = R 2 6000 = = 500 12 12
Input load impedances are approximately 10 k, so the load on the sources is relatively light. DC blocking capacitors are provided on the evaluation board. The load impedance connected to the outputs must be no less than 10 k and no more than 50 pF shunt capacitance. This enables driving short lengths of shielded or twisted wire cable. If heavier loads must be driven, use an external buffer as shown in Figure 13. Note that 50 isolation resistors are placed in series with each SSM2160 output and may be jumpered if desired.
Digital Interface
If lower impedance headphones were used, say 30 , the voltage required would be 0.9 V rms and a gain of 3 would suffice; thus, R1 = 2.5 k and R2 = 5 k. The 100 pF capacitor, C2, in parallel with R2, creates a low-pass filter with a cutoff above the audible range, reducing the gain to high frequency noise. A small resistor within the feedback loop protects the output stage in the event of a short circuit at the headphone output but does not measurably reduce the signal swing or loop gain. The dc blocking capacitor at the output establishes a high-pass filter with a -3 dB corner frequency determined by the value of C1 and the headphone impedance. With 600 headphones, an output capacitor of 15 F sets this corner at 20 Hz. Similarly, a 30 headphone will require 250 F. CAUTION: As with all headphone applications, listening to loud sounds can cause permanent hearing loss. REV. A
The interconnecting cable provided has a DB25 male connector for the parallel port of the PC and an RJ14 plug that connects to the evaluation board. This cable is all that is required for the computer interface.
Software Installation
If installing the software from a diskette and using Windows 3.1 or later, select the RUN command from the FILE menu of the Program Manager. In the command line, type a:\setup and press Enter. If you downloaded the software to your hard disk from the Analog Devices website to, for example, C:\SSM2160, on the command line type C:\SSM2160\SETUP and press Enter. The software will be automatically installed and a SSM2160 start-up icon will be displayed. Double-click the icon to start the application. Under the menu item Port, select the parallel port -13-
SSM2160
that is assigned to the connector used on your PC if different from the default LPT1.
Windows Control Panel Channel Mute
The control panel contains all the functions required to control the SSM2160, and each feature is described below. A mouse is needed to operate the various controls. It is possible to overload the VCA by incorrect input levels and master and control settings. If you have not read the sections of the data sheet regarding control planning, do so now. While no damage will occur to the SSM2160, the results will be unpredictable.
Master Volume
Same function as Master Mute but on a channel basis. Due to the design limitations, muting an individual channel results in an increased distortion level of the unmuted channels. Users must determine if this condition is acceptable in their application.
Channel Balance
The master volume fader controls the 7-bit word that determines the attenuation level. There are 128 levels (27) that range from 0 dB attenuation to -127 dB attenuation. To change the level, simply click the up or down arrows or click in the space directly above or below the fader knob, or drag the knob up or down to its desired position. (Drag refers to placing the screen cursor arrowhead on the control, pressing and holding the left mouse button while moving the arrow to the desired position.)
Master Mute
The channel balance fader adjusts all channels over their range without affecting the master volume setting. Relative channel differences will be maintained until the top or the bottom of the range is reached. The master volume fader does the same function as this fader, which was made available for evaluation convenience.
Master and Channel Fades
Below the master volume fader is the Master Mute button. Click this button to mute all channels. Clicking it again will unmute all channels. The application defaults to Mute when started. Mute reduces outputs to approximately -95 dB below inputs up to 0 dBu.
Channel Volume
Both master and channel fades can be achieved by pressing the MEM 1 button when levels are at a desired starting position and the MEM 2 button at the desired ending position. Fade controls individual channels, and Master Fade controls the master volume. Fade Time sets timing from 0.1 (fastest) to 9.9 (slowest). Press Fade to commence operation. If Fade is pressed again, a fade back to the starting point will occur. The Jump button causes a direct jump to the opposite memory position.
Halt
Halt is a software interrupt in case of a problem or to stop a long fade time.
Update
Each of the channel fader controls can be set to one of 32 levels of gain, from 0 dB to 31 dB. See the previous section on Master Volume for details.
Data currently on display is resent to the SSM2160. This is useful when parts are being substituted in the evaluation board, or when the interface cable is changed.
-14-
REV. A
SSM2160
OUTLINE DIMENSIONS 24-Lead Standard Small Outline Package [SOIC] (R-24)
Dimensions shown in millimeters and (inches)
15.60 (0.6142) 15.20 (0.5984)
24
13
7.60 (0.2992) 7.40 (0.2913)
1 12
10.65 (0.4193) 10.00 (0.3937)
2.65 (0.1043) 2.35 (0.0925) 0.30 (0.0118) 0.10 (0.0039) 1.27 (0.0500) BSC 0.51 (0.020) 0.33 (0.013) 8 0 SEATING 0.32 (0.0126) PLANE 0.23 (0.0091)
0.75 (0.0295) 0.25 (0.0098)
45
COPLANARITY 0.10
1.27 (0.0500) 0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-013AD CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Revision History
Location 2/03--Data Sheet changed from REV. 0 to REV. A. Page
Removed SSM2161 model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal Changes to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Changes to PACKAGE THERMAL INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Change to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Changes to Power Supplies vs. Signal Levels section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Changes to Update section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
REV. A
-15-
-16-
C03366-0-2/03(A)
PRINTED IN U.S.A.

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